Yes, neighboring wire capacitance has a big effect. And it's ugly to model because if that signal is transitioning it injects noise into the clock. And that can create failures which are devilishly difficult to track down.
When I started in the industry decades ago the traces (or wires) were much wider than they were tall. Over time the width of the lines shrunk but the metal thickness didn't much. Eventually they crossed over. (I don't know what year that was.) Even 5 years ago wires were much taller than they were wide. As a result neighboring line capacitance became predominate.
The total clock tree delay is not terribly important. Since the clock keeps running all the time you know when the edge will happen. It's like catching a subway train. It doesn't much matter to you how long the train takes to make its circuit so long as another train comes along soon.
What's very important is clock skew or matching. Hence this structure we have been talking about.
One second period! Wow, that's slow, for both the LC and the tuning fork. I want to see this.
A clock tree is a whole lot like dominoes. There is a scene in V for Vendetta where he triggers a huge domino pattern. After spreading out to a massive area, it converges back to a single point. And that point is timed so two dominoes land at the same time. It is exquisitely well done.
Of course in a clock tree you don't reconverge. But if you didn't do that you wouldn't be able to tell how well timed it all was. Well maybe.
If suppose if you had each of the leafs of the tree make a noise you would be able to tell how well synchronized they all were.
Allen Brown [link]
The early bird gets the worm, but the *second* mouse gets the cheese.